Baidu
map

Configurable memristive logic block for memristive-based FPGA architectures

Ho, PWC; Almurib, HAF; Kumar, TN

Ho, PWC (reprint author), Univ Nottingham, Dept Elect & Elect Engn, Semenyih, Selangor, Malaysia.

INTEGRATION-THE VLSI JOURNAL, 2017; 56 ( ): 61

Abstract

This article proposes a Configurable Memristive Logic Block (CMLB) that comprises of novel memristive logic cells. The memristive logic cells are cons......

Full Text Link


Baidu
map
Baidu
map
Baidu
map